The following is a breakdown of the 9 topics covered in the Electrical PM portion of the Engineer in Training Exam.

The percentage next to the subject is approximately how much of the total content of the PM session that particular subject makes up. This breakdown is as outlined by NCEES on their website.

I. Circuits (16%)

A. KCL, KVL

B. Series/parallel equivalent circuits

C. Node and loop analysis

D. Thevenin/Norton theorems

E. Impedance

F. Transfer functions

G. Frequency/transient response

H. Resonance

I. Laplace transforms

J. 2-port theory

K. Filters (simple passive)

II. Power (13%)

A. 3-phase

B. Transmission lines

C. Voltage regulation

D. Delta and wye

E. Phasors

F. Motors

G. Power electronics

H. Power factor (pf)

I. Transformers

III. Electromagnetics (7%)

A. Electrostatics/magnetostatics (e.g., measurement of spatial relationships, vector analysis)

B. Wave propagation

C. Transmission lines (high frequency)

IV. Control Systems (10%)

A. Block diagrams (feed forward, feedback)

B. Bode plots

C. Controller performance (gain, PID), steady-state errors

D. Root locus

E. Stability

V. Communications (9%)

A. Basic modulation/demodulation concepts (e.g., AM, FM, PCM)

B. Fourier transforms/Fourier series

C. Sampling theorem

D. Computer networks, including OSI model

E. Multiplexing

VI. Signal Processing (8%)

A. Analog/digital conversion

B. Convolution (continuous and discrete)

C. Difference equations

D. Z-transforms

VII. Electronics (15%)

A. Solid-state fundamentals (tunneling, diffusion/drift current, energy bands, doping bands, p-n theory)

B. Bias circuits

C. Differential amplifiers

D. Discrete devices (diodes, transistors, BJT, CMOS) and models and their performance

E. Operational amplifiers

F. Filters (active)

G. Instrumentation (measurements, data acquisition, transducers)

VIII. Digital Systems (12%)

A. Numbering systems

B. Data path/control system design

C. Boolean logic

D. Counters

E. Flip-flops

F. Programmable logic devices and gate arrays

G. Logic gates and circuits

H. Logic minimization (SOP, POS, Karnaugh maps)

I. State tables/diagrams

J. Timing diagrams

IX. Computer Systems (10)%

A. Architecture (e.g., pipelining, cache memory)

B. Interfacing

C. Microprocessors

D. Memory technology and systems

E. Software design methods (structured, top-down bottom-up, object-oriented design)

F. Software implementation (structured programming, algorithms, data structures)

Source NCEES